Int'l Wafer-Level Packaging Conference2012-11-05 - 2012-11-08
San Jose, CA
Wafer-Level, 3D, Stacked Packaging, MEMS, and Chip Scale
SMTA and Chip Scale Review are pleased to announce the 9th Annual International Wafer-Level Packaging Conference and Tabletop Exhibition. IWLPC brings together some of the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging.
For more information: http://iwlpc.com/