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stress in Silicon
2009-06-23
ashwini jambhalikar
2009-06-23
Tony Rogers
2009-06-23
Prasanna Srinivasan
2009-06-23
Robert MacDonald
stress in Silicon
Prasanna Srinivasan
2009-06-23
Ashwini,

You can find out the stress on the poped up layer by finding the radius of
curvature along the length and width of the pocket. Once you know these
details, then by making certain assumptions (isotropic material property,
rigid contraints at wall), you can estimate the stress which causes it
deform out-of-plane. You can refer to any mechanics book to know the
governing equations relevant to plate/membrane theory.

Regards,
Prasanna

On Tue, Jun 23, 2009 at 4:51 AM, ashwini jambhalikar <
[email protected]> wrote:

> Dear Friends,
>
> Can anybody suggest how to calculate stress developed in Anodically
> bonded thinned Silicon wafer with slelectively unbonded region.
>
> We are observing the following:
>
> step 1: pockets are etched  in silicon, and bonded to glass from
> etched side (anodic bonding)
> pocket dimension
> depth: 5 micron
> length and width 500 micron
>
> step 2: wafer is thinned from backside in DRIE.
> It is observed that the pocket region(unbonded region) pops up, when
> wafer is thinned to 30 micron
>
> Is it only due to stress related to Anodic bonding, or it is also due
> to the fact that silicon in thinned.
>
> In any case is there any way to analytically find out the stress.
>
> Ashwini.
reply
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