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MEMSnet Home: MEMS-Talk: Etching SOI wafer from back side
Etching SOI wafer from back side
2010-05-05
weiquan yang
2010-05-05
QAZI, MUHAMMAD
2010-05-05
Kagan Topalli
2010-05-06
Om Suwal
2010-05-06
weiquan yang
2010-05-07
Massimiliano Decarli
2010-05-06
M. Emre Karagozler
2010-05-07
Brian Stahl
2010-05-07
Jie Zou
Etching SOI wafer from back side
Kagan Topalli
2010-05-05
Hi,

PECVD nitride and oxides cannot withstand several hours of KOH or TMAH
etching. LPCVD nitride or thermally grown oxide might be the choices for
masking KOH or TMAH etching.

Regards.

--
Kagan Topalli
Postdoctoral Researcher
ElectroScience Laboratory
The Ohio State University
1320 Kinnear Road
Columbus, Ohio 43212
http://www.electroscience.osu.edu/
e-mail: [email protected]
--

On 2:59 PM, weiquan yang wrote:
> I want to etch away the Si base substrate of SOI wafer from back side and
> remain the top thin Si layer and buried oxide layer.  I try the wet etching
> in both ways (using TMAH or KOH solution). The SiO2 or Si3N4 deposited by
> PECVD were used as protection mask layers (both side: top and back). However
> SiO2 or Si3N4 can not survive very well in the hot sulution for long term
> (several hours). Some local areas of top Si layer of SOI was etched
> away. Could you guys kindly give me some suggestions? Is this due to the
> quality of SiO2 or Si3N4 layer? The quality of SiO2 or Si3N4 by PECVD may be
> not very good , so the SiO2 or Si3N4 can not survive.
> Some dry etching suggestion is aslo welcome.
>
> Thank you!
>
> Weiquan Yang
> EE department
> University of Texas at Arlington

reply
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