Yes, sounds like charge accumulation, esp. due to the depth at which
you see the undercut, though a SEM image would definitely confirm the
assumption.

What kind of DRIE equipment do you use, and what undercut would be acceptable?

On 9/14/10, [email protected]  wrote:
> Hi everyone ,
>
>        We are now etching holes through silicon wafers. When we are using low
resistivity silicon wafers, the sidewall profile can be perfectly controlled,
but when using high resistivity silicon wafers, very serious undercut was
observed at a depth only about 50 micron when Al was used as etching mask. So,
is this phenomenon caused by the charge accumulation due to the high
resisitivity or anything else? Anybody has experienced this and has a solution?
Thanks.
>
> ----------------
> Sincerely yours,
> Dayong Qiao, Ph.D.