Hi Dinh Ton,
we are using AuSn solder for wafer bumping and assembly (silicon, GaAs,
InP) since more than seven years. Similar to the application you
mentioned we used also a solder dam for silicon on silicon assembly and
vacuum sealing of a cavity. We studied the stability of several barrier
layers and investigated different bonding processes.
As we are an R&D institute we would be interested to share and extend
our knowledge in common projects. Please contact me for more information.
Best regards,
Hermann Oppermann
Dinh Ton wrote:
>Hi all,
>
>I have a question and hope if someone here can help.
>
>In my process, I normally do an anodic bonding step
>near the end to finish off the device - top wafer is
>silicon and bottom wafer is glass/Pyrex. I want to
>change the process a bit by replacing the bottom wafer
>with a Silicon wafer. To accomplish this glueing of
>the two wafers, I want to perform some kind of Au
>solder bonding or Au/Si eutetic bonding on the full
>wafer scale. I wonder if anyone out there doing this
>consistently enough to provide some advice.
>For Au solder bonding (Au/Sn, for example), or Au/Si
>bonding:
>how thick of the layers do I need? barrier layer? In
>the EV bonder (or other typical bonder) how much
>weight need to apply and at what temperature, and for
>how long? How do you go about in preparing your wafers
>to get the maximum and consistent bond? Etc...
>
>Thank you,
>MD
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--
--
Dr. Hermann Oppermann
Fraunhofer IZM
Gustav-Meyer-Allee 25
D-13355 Berlin, Germany
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phone: +49-30-46403-163, -160
Fax: +49-30-46403-161
email: [email protected]
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Dept. Chip Interconnection Technologies
Group Optoelectronics, HF and Sensor Integration
http://www.izm.fhg.de/
http://www.izm.fhg.de/avt/index.htm
http://www.izm.fhg.de/avt/opperm.htm
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