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Arvinder Chadha's Resume
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Arvinder Singh Chadha_resume_3year_work_experience.pdf (90.2 KB, application/pdf)
attached by chadhaa (Arvinder Chadha) on 2010-06-12 01:03
Three years work/research experience in numerical modeling, fabrication and characterization of nanostructures and devices for electronic and photonic application

Contact701 W Mitchell Cir Apt #314
Arlington, TX 76013
US
7203632168
chadhaa@colorado.edu
GoalA full time position where I can apply my knowledge of numerical modeling, fabrication and device characterization
SkillsExpertise in microfabrication processes and numerical modeling of nanstructures using CAD , FEA & FDTD software.
QualificationsArvinder Singh Chadha
Address: 701 W Mitchell Cir, Apt #314, Arlington, TX 76013, USA
Phone: 720-363-2168. Email: arvinder.chadha@mavs.uta.edu

OBJECTIVE:
A processing, design, modeling or development engineering position in the area of electronics, photonics or an interdisciplinary field

ENGINEERING SKILLS:
Process Equipment: PECVD, DC magnetron-sputtering, deep reactive ion etch (DRIE), mask aligner, III-V etcher, e-beam evaporator, thermal evaporator, dip coater
Measurement Equipment: Scanning electron microscope (SEM), Fourier transform infrared spectrometer (FTIR), interference microscope, Energy dispersive X-ray spectroscopy (EDX), parametric analyzer, probe station, transmission spectrometer, ellipsometer, oscilloscope
Processes: Self assembly using colloidal chemistry, electroplating, electro etching, oxidation, diffusion, photolithography, sputtering, evaporation, dry/wet etching, spin coating, lift off
Software: RSOFT, FEMLAB, MEEP, MATLAB, PSPICE, C++, CAD, RCWA, Verilog/VHDL, LabVIEW, FDTD, Microsoft Office, Assembly language
Modeling, Design & Testing:
- Designed, fabricated and characterized MOS logic circuit for time width modulation
- Tested and measured reliability of on-chip temperature sensor and cantilever switches
- Used reverse engineering to trace the process parameters and the circuit operation
- Designed an automated robot to find its path in and out of a maze in the shortest time
- Calculated the scattering & band structure for nanostructures and photonic crystals

EDUCATION:
Doctor of Philosophy, Electrical Engineering (Nanostructures and Devices), University of Texas at Arlington, Diagnostic/Qualifying
exam passed in Spring 2010. GPA: 4.0
Master of Science, Electrical Engineering (Nanostructures and Devices), University of Colorado at Boulder, Graduation Date- Dec’08, GPA: 3.6
Relevant Coursework: Micro Fabrication Laboratory (Semiconductor), Solid State Physics, Semiconductor Physics and Devices,Electromagnetic Radiation and Antennas, Optical Properties of Materials, Active Optical Devices, Solar Cells, Nanophotonics, VLSI-design, Digital and Analog Integrated Circuits.

RESEARCH EXPERIENCE:
Research Assistant, University of Texas at Arlington, 01/10- Present
• Designed a photonic crystal filter for absorption enhanced infrared photo detector
• Studied the surface texturing of silicon for omni directional antireflection coating for solar cell
• Designed recipes for dry etching of GaAs

Professional Research Assistant, QUEST Product Development Corp.- University of Colorado at Boulder, 01/09- 09/09
• Developed recipe for fabricating shape memory alloys, polymers, metals and thin film silicon together
• Studied the electrical and the mechanical properties of thin film silicon on a SOI wafer
• Designed circuitry for the embedded electronics to control the movement of an active catheter

Research Assistant, National Institute of Standards and Technology (NIST) - University of Colorado at Boulder, 05/07 - 11/08
• Modeled and analyzed RF antennas structures using finite element method software FEMLAB
• Fabricated RF antennas using photolithography, thermal evaporation, lift off and electroplating

Research Assistant, University of Colorado at Boulder, 01/07 - 05/08
• Synthesized gold nanoshells & silica particles (190nm-420nm) with size distribution < 5%
• Infiltrated polymers into nano structured opals (face centered cubic closed packed silica spheres) using spin coating technique
• Improved the reflectivity of inverse opals threefold using dry and wet etching
• Characterized the size and the optical properties of nano shells, spheres and opals using SEM and spectrometers

Research Intern, Indian Institute of Technology, Bombay, 03/05 - 03/06
• Developed a software in C++ for feature extraction & matching of stereo images from satellite platform

WORK EXPERIENCE:
Lead Teaching Assistant, University of Colorado, Boulder, 05/07 - 05/08
• Doubled the number of student representatives of Electrical Engineering Department through publicity
• Increased the participation of the students in the professional & the teaching development workshops

Teaching Assistant, University of Colorado, Boulder, 01/07 - 05/07
• Taught a laboratory course on electronic circuits involving semiconductor devices- diodes, transistors, MOS
• Extracted the AC/DC parameters of electrical circuits using PSPICE

Technical Head, Student Chapter IEEE, University of Mumbai, 05/05 - 05/06
• Organized technical seminars, industrial visits and technical competitions
• Increased the sponsorship by fifty percent for the technical competitions

HONOR/ACTIVITIES:
• Recipient of the Doctoral Dean’s scholarship, University of Texas at Arlington, August 2009
• Recipient of the NSF STEM scholarship, University of Texas at Arlington, August 2009
• Poster presented at Integrated Micro/Nano- Electromechanical Transducers, iMINT, Boulder, March’08
• First prize at Mechanical Design Contest, Indian Institute of Technology National Competition, 2003
• Maximum load carrying structure, Indian Institute of Technology National Competition, 2003
• Second prize in Industrial Design Workshop (SAE), University of Mumbai, 2003
• Second prize in Robotics, Student chapter IEEE, University of Mumbai, 2003
• Member of Optical Society of America (2008-2009) and IEEE (2003-2006)
Updated: 2010-06-12
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