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MEMSnet Home: MEMS-Talk: Transistor with B and P diffusion furnaces?
Transistor with B and P diffusion furnaces?
2003-05-09
Sampo Tuukkanen
2003-05-09
Bill Moffat
2003-05-09
BobHendu@aol.com
Transistor with B and P diffusion furnaces?
Bill Moffat
2003-05-09
Sampo,
      The first transistors I made in England in 1963 were NPN.  N doped wafer
oxidize and open hole, Boron dope in a Boron furnace for the P layer, oxidize,
and open smaller hole.  Phosphorus dope for the N layer using phosphorus
furnace, and drive in to achieve the correct base width.  Oxidize, open 2 holes
for contacts aluminum and define.  NPN transistor that was .015" square.  We
thought it was so small.  Bill Moffat

-----Original Message-----
From: Sampo Tuukkanen [mailto:sampo.tuukkanen@phys.jyu.fi]
Sent: Friday, May 09, 2003 6:47 AM
To: MemsTalk
Subject: [mems-talk] Transistor with B and P diffusion furnaces?


Hi all,

Is it possible/difficult to make a transistor by using P and B diffusion
firnaces?
I didn't find this information from the books at least very quickly...

If you first make p-doped pool with diffusion and then smaller n-doped pool
above that, does that make suitable structure for transistor or should you
have Ion-implantation machine that you could better define the doping area
and thichness?


- Sampo

_______________________________________________________
Sampo Tuukkanen, Room K215, Department of Physics,
PB 35 (YFL), FIN-40014 University of Jyväskylä, FINLAND
E-mail: sampo.tuukkanen@phys.jyu.fi
Tel: +35814 260 2392, Fax: +358 14 260 2351


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