Hi Jing,

   The size and pattern of your etch holes all depend on your requirements.

Do you have any material incompatibilities with HF which could cause
material corrossion?

More holes less etch time thus less corrosion.

Does your released structure have a curvature due to deposited materials?

You would have to consider edge effects on the structure as well as variable
etch rates which can cause small chunks of silicon to be ripped away from
either device layer due to these tensile or compressive forces.

Also for any hole pattern you choose, conduct an etch simulation (expanding
circles) which also include the edge to make sure you don't have isolated
islands of oxide left unless it is desired.

Phil Tabada

>From: Jing Liu 
>Reply-To: General MEMS discussion 
>To: mems-talk@memsnet.org
>Subject: [mems-talk] DRIE/SOI structure releasing hole?
>Date: Thu, 2 Oct 2003 13:22:30 -0400 (EDT)
>
>Dear colleges,
>
>I will use 20um and 50um thick device layer SOI wafer to fabricate a large
>structure(2000um by 2000um square) with DRIE. To release the structure
>with HF, I need to design etching holes.
>
>I wonder what's the appropriate etching hole size and hole offset  should
>I adopt to smooth the HF etching process but still keep the size(mass) of
>the
>big structure as much as possible?
>
>Thanks for your possible help!
>
>Jing
>
>MEMS Lab.,
>Dept. of Mechanical Engineering,
>Univ. of Maryland, College Park,
>MD, 20770
>
>
>
>
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