Hey all,
I am doing the assembly of ccd small chips (around 10 x 10mm, Si
material with SiON passivation layer) with the Si substrate. The
critical requirement is the surface flatness across the assembled
wafer, i.e . can do the subsequent lithography on the assembled wafer,
since the folloowing step is to grow pattern on the integarted wafer,
espectially on the top of ccd chip. Does anyone has experience or good
idea on this?
The current approach is to use polymer (SU-8) bonding between Si and
CCD chips. although we still have potential to continue this way, this
is not easy to control the surface flatness and i would like to know
if there has some better idea.
PS: the temperature tolerance/requirement is as high as possible,
although 250C is acceptable at this time.
thanks a lot for your help!
best regards
Jing