Dear Mike-
The fastest way to make the cantilevers would be to order bare <110> wafers
then have the same place put down the 1000A oxide followed by the 300A low
stress nitride. I am assuming here that you are using the oxide to act as a
buffer to remove any residual stress gradients within the nitride. Without this
intervening oxide, I found a substantial stress gradient within the nitride,
most likely due to the silicon-nitride interface.
For reasonably thick nitride cantilevers, the stress gradient without the
silicon dioxide buffer was not so significant. For example, 80 micron long
cantilevers comprised of 900A thick nitride were bent down 3 microns at the
end. Unfortunately, as you make thinner cantilevers, the stress gradient
becomes much larger, so that 100A thick cantilevers were completely
cork-screwed. Interestingly, the nitride stress gradient was dependent on the
orientation of the underlying silicon, again hinting at chemical effects at the
nitride-silicon interface. The oxide buffer drastically reduced the stress
gradient and allowed nearly flat 100A thick cantilevers to be produced. Some
variation in the gradient was noticed from run to run, but since you want 300A
thick cantilevers, this variation should not be perceptible.
The stress gradient in your nitride is likely to be process dependent, though I
have not investigated low stress nitrides from other sources. I would suggest
following the Berkeley low stress process, in which the nitride is grown at
835C with a process pressure of 140 mtorr with a dichlorosilane flow of 100
sccm and an NH3 flow of 25 sccm. This process gives an excellent blend of low
stress ( ~270 MPa tensile) and chemical integrity. The possible sources are
UCB, Stanford, MIT, and Cornell. I believe MCNC is thinking about bringing this
process up, but I am not sure whether it is there yet.
Concerning wafer sources (without oxide), I found the Virginia Semiconductor to
be the most reasonable. Moreover, if you are making a two dimensional design,
be careful to ensure where ALL the <111> planes are oriented. Unless the vendor
is careful in cutting the wafers from the boule, or the boule already has two
flats cut into it, there are two possible orientations of the {111} planes with
respect to the wafer flat.
Oh, yes, one final point. Without critical point drying developed at the
Berkeley Sensor and Actuator Center by Greg Mulhern, very few of the
cantilevers will make it through processing without sticking to the silicon.
I hope this has been helpful.
Storrs Hoen