Bernard Legrand wrote:
>
> Hello,
>
> First, sorry for my poor English !
>
> I'm working on p-type (5-10 ohm.cm) silicon on insulator substrate.
> The Si top layer is 15 nm thick.
> My purpose is to realise Si nanowires.
>
> I use an Atomic Force Microscope to realise the lithography on H passivated
> surface (HF treatement) which leads to a SiO2 mask (for example : height 1.5
> nm / width : 20 nm).
> Afterwards I use a KOH etching (1 mol.l-1 20 °C 1 min) which gives very good
> and reproductible results to obtain the Si wires on insulator.
>
> The problem comes when I try to realise nanowires between metallic contacts.
> I have made metallisation using PMMA resist and ebeam lithography.
> The contacts are 2 nm Ti, 20 nm Au ; and they are separated by 2 µm.
>
> The sample is cleaned using first aceton and isopropyl alcool and after
> sulfochromic solution during 10 minutes and DI Water rinsing (30 s).
> The H passivation is then realise with 5% HF during 20 s (which seems not
> to etch the metal) followed by DI water rinsing (30 s)
> So I make the AFM lithography between the contacts.
>
> Afterwards I etch the sample using KOH (1mol.l-1 20 °C). In about 1 minute
> the top layer of Si is etched everywhere on the SOI sample EXCEPT between
> the metallic contacts either I have realised AFM lithography or not. So I
> can't obtain the nanowires !!!
>
> Either if I etch the sample longer, the Si top layer remains between the
> metallic contacts. I have tried ultrasonic agitation but it does not change
> anything. Sometimes the results are a bit better and the Si is partly etched
> between the metallic contacts but I don't know the reason why.
>
> So if you have any idea to improve the KOH etching I will be very grateful.
>
> Best regards
>
> Bernard Legrand
>
Bernard,
I believe what you see is an electrochemical effect. The metals, Si and
KOH form a battery cell. Now, there is a passibation potential, known
from those electrochemical etch-stop I-V-curves, which you can find in
many papers and books. So if your battery biases the silicon accordingly
you won't see etching. I had that experience with chromium-copper,
nothing was etching at all. The matter is highly interesting, since one
could probabley achieve a type of etch stop or IC protection, without
external electrodes. However, one needs the time and resources to do
some serious science here, such as I-V-plots etc.
You might want to vary the following parameters:
KOH concentration, temperature, or different etchant
silicon doping type and/or concentration
contact metals (Cr-Au worked for me)
good luck
--
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Alexander D. Hoelke, Graduate Student Electrical Engineering
University of Cincinnati, Center for Microelectronic
Sensors and MEMS (CMSM) Cincinnati, Ohio 45221
Phone 513-556-4774 (work) 972-470-9735(home)
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