Reply to: RE>FWD>Mechanical properties of Si chips.
Hakan Elderstig
I know that the technique used to polish the backside of a wafer (GaAs in
particular, but also silicon) can impact the tendency of the die to crack under
loads introduced by the die bonding. Polishing and grinding introduce scratches
into the wafer surface (essentially the equivalent of fine cracks at the
surface) and the strength of a brittle material is determined by the size,
geometry and distribution of these flaws. I don't have any references on hand,
but I do know that there is a reasonable body of literature concerning the
impact of polishing on die strength. (Try ISHM and reliability journals first).
-Peggy Kniffin
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Date: 4/18/96 5:52 AM
To: Peggy Kniffin
From: Sarah Audet
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Date: 4/17/96 1:46 PM
From: mems@ISI.EDU
Silicon is a strong material they say....
We have put our bulk micromachined silicon chips in a plastic
package. Some of the chips breaks or we can se fine cracks, usually
close to the v-grooves. There is a bonded glass lid on top of the
v-grooves that should strengthen the device. The chips also had been
edge polished after dicing with 3 microns and 0.3 micron papers. Do
anyone know if the polishing itself can lower the mechanical strength
of the chips? Or is the dicing bad enough?
Hakan Elderstig